Dynamic access random memory (DRAM) is commonly utilized as rapid-access memory of computer systems. DRAM has traditionally utilized unit cells that contain a capacitor in combination with a transistor. In such traditional designs, a charge state of the capacitor is utilized to store and sense a memory bit.
Higher performance, lower cost, increased miniaturization of components, and greater packaging density of integrated circuits are ongoing goals of the computer industry. In pursuit of miniaturization, the capacitor/transistor combinations of traditional DRAM memory cells have been continually redesigned to achieve ever higher degrees of integration. However, it is becoming increasingly difficult to reduce the dimensions of DRAM capacitors while still maintaining sufficient capacitance to dependably store a memory bit.
The difficulties of reducing the dimensions of DRAM capacitors have led to the development of so-called capacitor-less memory devices. Such memory devices store charge on a component other than a capacitor. For instance, capacitor-less memory devices may use a floating body to store a memory bit (with the term “floating” indicating that the body is not in direct ohmic connection with a source of electrical potential, or, in other words, that the body is surrounded by electrically insulative material).
Although capacitor-less memory devices show some promise for ultimately taking the place of traditional DRAM memory cells, there are presently numerous difficulties encountered in attempting to utilize capacitor-less memory devices. One of the difficulties is that capacitor-less memory devices tend to be much more leaky than traditional capacitor/transistor memory cells, which means that the capacitor-less memory devices need to be refreshed at a higher rate than traditional memory cells. The higher refresh rate leads to higher power consumption which can drain batteries, and/or cause undesired heating. Another of the difficulties associated with capacitor-less memory devices is that the charge-storage components of such devices tend to be more difficult to charge than the capacitors of traditional DRAM, which can lead to excess power consumption, severe reliability issues and/or to inadequate device performance.
It is desired to develop improved capacitor-less memory cells.